Development of Multi-Layer Fabrication Process for SFQ Large Scale Integrated Digital Circuits

نویسندگان

چکیده

We have developed a fabrication technology for the development of large-scale superconducting integrated circuits with Nb-based Josephson junctions. The standard process 10 mask levels uses four metal layers including 3 Nb and Mo resistor layer. influence deposition parameters on film stress, electrical properties, surface roughness were studied systematically. High quality Nb, Al, Mo, SiO2 films successfully deposited subsequent circuits. circuit started resistors target sheet resistance Rsh 2 Ome, followed by Josephson-junction. critical current density Jc was set at 6 kA per cm2. thicknesses etch depths monitored during on-wafer process-control-monitor (PCM) patterns all wafers.

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ژورنال

عنوان ژورنال: IEEE Transactions on Applied Superconductivity

سال: 2021

ISSN: ['1558-2515', '1051-8223']

DOI: https://doi.org/10.1109/tasc.2021.3065277